VeriBench
Website
Website not available yet
Verilog-AMS Testbench Framework for Open EDA Verification
ProjectID
VeriBench
Acronym
VeriBench
Additional Info
- Resources
- Source code
- https://github.com/deutzlukas-hub/veribench.git
Enduser Relevance
Not available yet
Contact
https://nlnet.nl/contact/
Endorsements
Not available yet
Disclaimer
Not available yet
Country:
NGI Project: NGI Zero Commons Fund
Status: Early research demo
Category: Trustworthy hardware and manufacturing
check other similar innovations
FastScan
Performance improvements for ScanCode Toolkit/ScanCode.io
Firmwire full-system 5G baseband emulation
Easier testing of 5G baseband modems with FirmWire
Sensotrend Connect
Sensotrend combines data from medical devices and wellness trackers, derives actionable insights from the data, and facilitates sharing the data...
webxdc PUSH
Towards an usable, interoperable and trustworthy web app ecosystem